decoder

Caesar Encoder and Decoder source code integrity, and can be used directly.

凯撒编解码器的源代码的完整性, 并可以直接使用.

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JPEG decoder for the implementation of JPEG decoding and encoding. Everyone to share.

JPEG解码,用于实现JPEG的解码和编码. 大家来共享.

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This means that the effective system delay introduces by the decoder is negligible.

这意味着有效的系统延迟由译码器介绍是微不足道的.

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The ASIC chip of speech decoder is designed in this paper.

本系统是要完成一个语音解码芯片的专用集成电路的设计.

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This article focuses on the optimization of architecture for the soft output viterbi algorithm ( SOVA) decoder of Turbo code.

分析Turbo Code的软输出维特比（SOVA）译码器的结构优化方法。

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Brand new more stable video decoder.

全新的更加稳定的视频解码器.

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Base on SOVA algorithm, an SOVA sub-decoder IP core is designed and the function of each module is described.

在简单分析SOVA译码算法的基础上，对SOVA子译码器IP核的设计进行了整体分析；

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The algorithm of this paper employs three coding rate . It comprises two parts, coder and decoder.

本文介绍的算法使用了三种编码速率, 分编码器和解码器两部分.

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On a comprehensive consideration of the coding-rate and complexity of hardware implementation of Turbo decoder, a high coding-rate parallel Turbo decode algorithm is designed and a controller structure applicable to different decoding algorithms is presented.

在综合考虑了Turbo译码效率和硬件实现的复杂度的基础上，设计了一种高效的并行Turbo译码算法，并且给出了一种设计较为简单，适用于不同并行译码算法的控制器结构。

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This paper proposes a design scheme of hardware accelerator for CABAC decoder in H. 264.

提出一种针对H. 264标准的CABAC解码器的硬件加速器的设计方案.

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This thesis covers the IC design of a DAB audio decoder.

本课题的任务是设计DAB接收机的音频解码系统.

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Special Agent Inc. Sunplus decoder IC, amplifier IC, supply in time!

公司特代理凌阳解码IC 、 功放IC, 供货及时!

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Implementation of RS ( 31,15) Encoder and Decoder with FPGA

高速RS（31,15）编译码器的FPGA实现

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Error concealment by postat the decoder can involve temporal prediction , spatial prediction and conjunction of them.

对于解码器端的错误隐藏技术主要用时域隐藏, 空域隐藏及几种技术结合使用的方法.

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The output of the decoder should be converted back to an analogue signal by similar means.

解码器的输出应当以同样方法转回到模拟信号.

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Variable Length Decoder ( VLD ) has been widely used in kinds of video coding standards.

可变长 解码器 广泛用于各种视频压缩标准中.

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The instruction decoder decodes the instruction in IR.

指令解码器将在指令寄存器内的指令解码.

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Design and Optimization of Turbo Decoder Based on SOVA Algorithm

基于SOVA算法的Turbo译码器的设计与优化

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You do not have a decoder installed to handle this file.

您没有安装可处理此文件的解码器.

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I think maybe could add a new CD decoder for Teac 7 N?

解码器可能会出现在我的下一套系统(计划中) 吧.

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MCU analog decoder 2272, using interrupt method to determine precise synchronization code.

51单片机模拟2272解码, 采用中断方法,精确判断同步码.

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Practical problems: The encoder and decoder share a staggering amount of code.

实现的问题: 编码器和解码器共享了惊人的数量的代码.

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An instruction decoder based on CPLD and AT 89 C 51 is designed in this paper.

本文设计了一种基于AT89C51和CPLD的指令解码器.

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Decoder Design to Smooth Blocking Effect of Block DCT Compressed Images

平滑图像块效应的解码器设计

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We use the open-source statistical machine translation software to train the language model and translation model, and the decoder to decode.

利用开源的统计机器翻译软件对语言模型和翻译模型进行训练，并使用本文设计的解码器进行解码。

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Design of an SOVA Sub-Decoder IP Core with Memory Optimization

一种节省存储量的SOVA子译码器IP核的设计

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The HSS is used for checking the conformance of a bitstream or a decoder.

HSS用来检查位流或解码器的一致性.

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In the embedded operating system platform, Analog camera signals were digitalized by a video decoder, and converted into suitable size for viewing by the processor. Then the video was compressed into MPEG-4 format. Data stream was sent out through the CDMA wireless module.

在嵌入式操作系统平台下，摄像头模拟信号通过视频解码器进行数字化，经处理器转换为适合观看的格式，之后图像经压缩成MPEG-4格式，数据流通过CDMA无线模块发送。

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A transcoder for transcoding digital video signals includes a decoder and an encoder.

一种转换编码器,用以转换编码数位视讯,并包含一个解码器及一个编码器.

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We also discuss the embedding capacity, the optimum watermark decoder and detector and system protocol.

还讨论了水印体系的容量 、 水印的最优解码器和检测器构造及体系协定.

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