fpga

The second part uses FPGA ( Field Programmable Gate Array) to realize the HDLC protocol.

第二部分是利用FPGA（Field Programmable Gate Array，现场可编程门阵列）来实现HDLC协议。

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An implementation scheme of IJF coding based on FPGA is proposed, which has the features of highly integration, flexible configuration, stable performance.

提出一种基于FPGA的IJF数字基带编码实现方案，具有高度集成、占用资源少、配置灵活、性能稳定的特点。

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This paper introduces a FPGA-based TFT-LCD display controller design and implementation methods.

文章介绍了一种基于FPGA的TFT-LCD显示控制器的设计和实现方法.

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Responsibility: 1. Design high speed FPGA board for algorithm verification . 2.

工作职责: 1. 设计用于算法验证的高速FPGA板.

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Logic block packing is the last procedure of FPGA technology mapping.

装箱是FPGA工艺映射中的最后一步流程.

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The Implementation of the Transversal Filter with FPGA ( Field Programmable Gate Array) in the Adaptive Equalizer

自适应均衡器中横向滤波器的FPGA实现

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A trigger signal generator based on FPGA is introduced in this article.

介绍了一种基于可编程逻辑门阵列(FPGA)的脉冲触发信号发生器.

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Technology on configurable system-on-chip FPGA ( Field Programmable Gate Array) is a kind of programmable logic device.

可配置片上系统技术FPGA属于可编程逻辑器件，芯片内部以阵列状排列各种可配置逻辑模块。

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The FPGA ( Field Programmable Gate Array) Implementation of Constant Module Multi-user Detection Algorithm

恒模多用户检测算法的FPGA实现

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In the local area network, realize a set of image acquisition, image processing, Web server, remote control in one high-integrated network monitoring system based on high-capacity FPGA ( Field Programmable Gate Array).

基于大容量FPGA（Field Programmable Gate Array），在局域网中实现了一种集图像采集、图像处理、Web服务器、远程控制于一体的高集成化网络监控系统。

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Finally this circuit verified by FPGA and the test result given.

最后,通过现场可编程门阵列(FPGA)验证,给出了测试结果.

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Pin on the FPGA chip packaging some of the information.

有关FPGA芯片的管脚的封装的一些资料.

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The software includes program for FPGA programming and PCI bus device driver.

软件主要包括FPGA编程和外部设备互连PCI总线驱动程序.

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Lastly the digital signal processing block made of FPGA + DSP is presented.

最后给出了由FPGA+DSP构成的数字信号模块的实现过程.

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Nowadays FPGA ( Field Programmable Gate Array) technology is one of the main methods for realizing electronic integrated circuit.

FPGA（Field Programmable Gate Array）技术已经成为当今实现电子线路集成化的重要方法之一。

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The smoothly running of step motor can be implemented using FPGA.

用现场可编程门阵列(FPGA)实现步进电机平滑运行.

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We selected FPGA ( Field Programmable Gate Array) platform for parallel processing.

我们选择FPGA（现场可编程门阵列）作为并行处理平台。

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The FPGA ( Field Programmable Gate Array) is a new large-scale integrated logic IC.

现场可编程门阵列（FPGA&Field Programmable Gate Array）是新型的大规模集成逻辑器件。

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Parallel Scrambler Design and FPGA Implement

并行扰码器设计与FPGA实现

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This paper gives two skeletonizing schemes using DSP and FPGA individually and also gives an appropriate scheme of DSP+ FPGA for digital image processing.

本文研究了分别使用DSP和FPGA实现形态学骨架提取算法的两种方案，在此基础上提出一种DSP结合FPGA实现图像处理的方案。

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Realizing positive justification and simple BER tester with a FPGA individually.

在FPGA上分别设计实现了正码速调整和简单误码率测试仪,并连接成功.

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The FPGA implementation scheme of LPT is also discussed in the paper.

给出了对数极坐标变换的FPGA实现方案.

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Using the MCU control the FPGA driven module advance speed control accuracy.

由于单片机控制模块的使用使得FPGA驱动模块对定位控制更加方便,速度控制精度很高.

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With the quickly development of Field Programmable Gate Array, FPGA with more than million logic gates has been used.

随着FPGA（现场可编程门阵列）技术的快速发展，万门以上乃至几十万门逻辑阵列的使用越来越普遍。

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Through update FPGA logic and system software, this platform can support two-dimension code, RFID card and Security control functions, which prove the advantages of SoPC technology& soft/ hardware reconfigurable and platform reuse-able.

另外，通过对升级与更改FPGA硬件逻辑以及系统软件，可使系统平台支持二维条码扫描、RFID卡读写，门禁控制等功能，实现了软硬件体系的可重构与平台的可重用。

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Current research reports shows worldwide Core Control designs are tending to use FPGA ( Field Programmable Gate Array) as basic method.

在目前国内外的研究中，普遍的倾向是使用FPGA（现场可编程逻辑门阵列）来设计OBS核心控制卡。

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An FPGA is a chip that consists of many unconfigured logic gates.

FPGA是一种包含许多未配置逻辑门的芯片.

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Then, we introduced island-style model and design flow of FPGA.

然后简要介绍了FPGA的岛状模型以及设计流程.

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Infrared Image Sharpening Algorithm Based on DSP+ FPGA

基于DSP+FPGA的红外图像锐化算法的实现

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SRAM FPGA system soft simulation designed to realize bitwise write bitwise Reading.

FPGA系统的sram的软仿真设计,可以实现按位写,按位读.

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