buffer circuit的例句大全

Analysis and Parameter Calculation of a Kind of New Buffer Circuit

一种新颖缓冲电路分析及参数计算

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The RDC clamp buffer circuit is researched based on the solenoid valve control of industrial lockstitch sewing machine.

为此，基于高速工业平缝机的电磁阀控制，对钳位型RDC缓冲电路进行了研究。

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the modified design of hydraulic buffer circuit-breakers

高压断路器中油缓冲器改进设计

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research into the application of hydraulic buffer circuit to the steel coil wagon

缓冲回路在钢卷运输车上的应用研究

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The driver circuit, buffer circuit and cooling equipment of IGBT device are designed.

设计了IGBT器件驱动电路、缓冲电路和散热装置。

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The main electric circuit uses integration microprocessor and IC, few buffer circuit for stable operation.

主要功能电路采用集成度很高的单片机, 外围电路很少,工作更加稳定.

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The data is sent to A/ D through conditioning circuit, and then it is sent into PC by FIFO buffer through EZ-USB. After algorithm conversion, the D/ A conversion outputs analog signal to carry out real-time control.

采集的数据经调理电路送A/D模数转换，再由FIFO缓存器经EZ-USB送上位机处理。经算法变换后的数据，由D/A转换输出模拟信号，实现实时控制。

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The analog part includes the switch controlling circuits, driving circuits, operation amplifier, sample/ hold circuits, phase modulating circuits, unity gain buffer, current reference source, compensation capacity array, voltage conversion circuit.

模拟部分包含控制开关电路、驱动电路、前级运算放大器、采样保持电路、相位调节电路、单位增益缓冲器、基准电流源、电容补偿阵列、开关电压转换电路。

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Trace Buffer was widely applied in recording the historical track in the period of the programs' execution. And this convenience is used in many kinds of In-circuit Emulators and Oscilloscopes.

跟踪缓冲可以记录程序执行的历史轨迹，这在各种在线仿真器（ICE）和逻辑分析仪中得到了广泛的应用。

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By reasonably using the special resources in FPGA, such as DCMs ( Digital Clock Manager) and BUFGMUXs ( global clock MUX buffer) and manually building up a proper clock circuit, the interference to timing caused by clock skew is mostly reduced.

通过合理使用DCM（数字时钟管理单元）和BUFG-MUX（全局时钟选择缓冲器）等FPGA的特殊资源，手动搭建时钟电路，可以尽可能地减少时钟偏差对电路时序的影响。

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now, we can implement the 9 × 9 or 18 × 18 shared buffer atm switching unit using two chips of very large fpga by simply modifying the circuit.

通过简单的电路修改，用两片超大容量FPGA可以实现9×9或18×18共享缓存的ATM基本交换单元。

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A two-solenoid valve ( battery-buffered ) is arranged in parallel to the servo circuit.

双电磁阀 ( 电磁缓冲器 ) 和伺服阀回路平行布置.

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