SDRAM的例句大全

Features of DDR SDRAM, basic configuration and timing of DDR controller, together with basic configuration and timing of PCI bus, are discussed first, while basic theory and development process of FPGA are introduced.

论文中首先讨论了DDR SDRAM的特性，DDR控制器的基本结构和时序，以及PCI总线的基本结构和时序，并介绍了FPGA的基本原理和开发过程。

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Image recognition module to complete: for digital image acquisition module control; the SDRAM memory read write control; to complete the uptake of the image recognition, and output quality type information code.

质量检测模块中完成：对图像数据样本发生的控制；对数字样本缓存的读写控制；完成对所摄取的图像识别，并输出代表质量类型的信息码。

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The 16 MB SDRAM was the system memory.

16MB SDRAM为系统内存。

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In this paper, the instruction FIFO in the SDRAM controller is introduced. Full utilized the pipeline characteristic of the SDRAM, the performance of the no cache embedded microprocessor is improved.

本文提出了SDRAM预取FIFO的设计，充分利用SDRAM的流水特性，提高无Cache嵌入式处理器性能。

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A design of deep FIFO for video and audio delay line device is introduced. The deep FIFO is implemented by using SDRAM instead of dual port RAM, and a dual port SDRAM controller is implemented by FPGA.

介绍视音频延时器用大容量FIFO的设计，大容量FIFO的设计采用了SDRAM代替双口RAM，并采用FPGA设计双口SDRAM控制器。

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Through the high speed DDR SDRAM module at the hardware platform, we may improve the throughput of FPGA digital interface to satisfy the requirement of the high speed D/ A convector for transmission rate of digital interface.

通过硬件平台上的高速DDR SDRAM模块，可以提高FPGA数据端口的吞吐量，满足高速D/A转换器对其数字接口传输速率的要求。

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This article introduces that in radar raster display system, using SDRAM as video memory and adopting FPGA to carry out the process of control circuit.

本文介绍了在雷达光栅显示系统中，应用SDRAM作为视频存储器时，采用FPGA实现控制电路的过。

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Secondly, the main Circuit design of SDRAM and IDE BUS interface by Allegro are analyzed in details;

然后，详细介绍了利用Allegro实现嵌入式系统中SDRAM和IDE总线接口的电路设计；

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Because Synchronous Dynamic Random Access Memory ( SDRAM) has the advantages of mass storage, high speed, burst read/ write and low cost, which is widely used in various fields.

同步动态随机存储器SDRAM因其容量大、读写速度快、支持猝发式读写及相对低廉的价格而得到了广泛的应用。

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DDR SDRAM ( Double Data Rate SDRAM, Double Data Rate Synchronous Dynamic Random Access Memory) has been widely applied in these areas of demand for storage devices for its high-speed, large capacity and good compatibility.

DDR SDRAM（Double Data Rate SDRAM，双倍数据率同步动态随机存储器）以其高速率、大容量和良好的兼容性在这些需求存储设备的领域得到了相当广泛的应用。

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Employing the top-to-bottom design method, the SDRAM Controller is divided into four modules: SDRAM control interface module, command module, data path module and controller top module which initialize and combine the other three modules.

SDRAM控制器设计采用自顶向下模块化的设计方法，共分为四个模块：SDRAM控制器顶层模块、控制接口模块、命令模块和数据通路模块，SDRAM控制器顶层模块初始化并把其余三个模块有机地结合起来。

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The Memory chip is DDR SDRAM memory type chip.

内存芯片的DDR SDRAM内存芯片的类型。

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Design of Mass Storage Based on USB 2.0 Protocol and SDRAM

基于USB2.0及SDRAM的大容量存储卡设计

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A design is expatiated which can satisfy the speed and capacity of the memory only using normal DDR ( Double Date Rate) SDRAM. And implemented the DDR memory controller in FPGA.

阐述了一种采用普通DDR内存即可实现的高速大容量报文缓存方案，并在FPGA中实现了DDR内存接口管理控制器。

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Modules Design and Verification Technology Research of DDR2 SDRAM Controller

DDR2内存控制器的模块设计和验证平台技术研究

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Design and realization of high speed and deep asynchronous FIFO based on DDR2 SDRAM

基于DDR2SDRAM的高速大容量异步FIFO的设计与实现

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The design and verification based on FPGA for integrity of DDR2 SDRAM interface signals

基于FPGA的DDR2SDRAM接口信号完整性设计与验证

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DDR2 SDRAM is, at present, one of the most widely used kind of the memory.

DDR2内存是目前应用最为广泛的存储器产品之一。

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Design and Verification of DDR2 SDRAM Controller

DDR2SDRAM控制器的设计与验证

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The embedded system in this thesis include CPU, memory part, LCD part, touching screen, keyboard, FLASH, SDRAM and internet interface and so on.

本论文的嵌入式硬件环境，包括CPU的外围时钟电路，复位电路，存储器单元，LCD模块，触摸屏，键盘，FLASH，SDRAM，网络接口等部分。

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