high-speed data acquisition system controlled by single-chip computer

timing parameters'influence on high speed data acquisition system

时钟参数在高速数据采集系统中的影响

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a dsp-based high-speed data acquisition system for nuclear magnetic resonance logging

基于DSP的核磁共振测井用高速数据采集系统的设计

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design of a large-scale and high-speed data acquisition system

大容量高速数据采集系统的设计

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high-speed data acquisition system for detecting signal of infrared focal plane arrays

用于检测红外焦平面阵列探测器信号的高速数据采集系统

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design of two-channel high-speed data acquisition system

双通道高速数据采集系统的设计与探讨

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the design of a high-speed data acquisition system for transformer's impact current

变压器冲击示伤电流高速数据采集系统设计

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isp technology and its application in high- speed data acquisition system

ISP技术及其在高速数据采集系统中的应用

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high-speed data acquisition system for airborne three linear array ccd camera for three-dimensional photographing

用于机载三线阵CCD相机三维立体摄影的高速数据记录系统

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high-speed data acquisition system design of single-chip microcomputer for transient travelling wave fault location

输电线路行波故障定位中高速数据采集系统的实现

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design of a high-speed data acquisition system applied to the ccd device

一种用于CCD器件的高速数据采集系统的设计及编程

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design of a high-speed data acquisition system used in the electric machine test with multi-channel

用于电机试验的多通道高速数据采集系统设计

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based on usb specification, a new design method for ccd high-speed data acquisition system is proposed.

提出一种CCD用于通用串行总线（USB）高速数据采集系统设计的新方法。

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research of the dissertation is based on the high-speed data acquisition system.

本文的研究工作以高速数据采集系统为基础。

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therefore, it is necessary to choose an appropriate structure to build a high-speed data acquisition system.

因此，需要选取合适的系统结构来完成整个高速数据采集系统的设计。

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the paper mainly states the theory and method of high-speed data acquisition system based on equivalent time sampling.

在此论述了基于等效时间采样的高速数据采集技术的基本原理以及整体实现方案。

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this paper addresses a frame of high-speed data acquisition system which based on usb and i^2s bus.

介绍一种基于USB和I^2S总线的高速数据采集系统的结构。

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the high-speed data acquisition system based on fpga, which is the core logic control module of the system is introduced.

本文介绍了以FPGA为核心逻辑控制模块的高速数据采集系统。

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the partial discharge signals were coupled by uhf sensor, and then the signals were sampled by high speed data acquisition system.

利用超高频传感器耦合局部放电信号，继而使用高速采集系统完成局放信号的采集，并浅析浅析了该策略的可行性。

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system debug and performance test of the high-speed data acquisition system. acquire and process the if lmf signal.

数据采集系统的联调和性能测试对中频线性调频信号进行了采集和处理。

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the high-speed data acquisition system is widely used in both civil and military application.

高速数据采集在军用民用领域都有着广泛的应用。

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